FIMC-IS blocks must control 3 more clocks ("gicisp", "mcuctl_isp" and
"pwm_isp") to make the hardware fully operational.
Signed-off-by: Marek Szyprowski <m.szyprow...@samsung.com>
---
arch/arm/boot/dts/exynos4x12.dtsi | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/exynos4x12.dtsi
b/arch/arm/boot/dts/exynos4x12.dtsi
index c452499ae8c9..3394bdcf10ae 100644
--- a/arch/arm/boot/dts/exynos4x12.dtsi
+++ b/arch/arm/boot/dts/exynos4x12.dtsi
@@ -157,7 +157,9 @@
<&clock CLK_MOUT_MPLL_USER_T>,
<&clock CLK_FIMC_ISP>, <&clock CLK_FIMC_DRC>,
<&clock CLK_FIMC_FD>, <&clock CLK_MCUISP>,
- <&clock CLK_DIV_ISP0>,<&clock CLK_DIV_ISP1>,
+ <&clock CLK_GICISP>, <&clock CLK_MCUCTL_ISP>,
+ <&clock CLK_PWM_ISP>,
+ <&clock CLK_DIV_ISP0>, <&clock CLK_DIV_ISP1>,
<&clock CLK_DIV_MCUISP0>,
<&clock CLK_DIV_MCUISP1>,
<&clock CLK_UART_ISP_SCLK>,
@@ -167,6 +169,7 @@
clock-names = "lite0", "lite1", "ppmuispx",
"ppmuispmx", "mpll", "isp",
"drc", "fd", "mcuisp",
+ "gicisp", "mcuctl_isp", "pwm_isp",
"ispdiv0", "ispdiv1", "mcuispdiv0",
"mcuispdiv1", "uart", "aclk200",
"div_aclk200", "aclk400mcuisp",
--
1.9.1
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