Hi Mauro,
Mauro Carvalho Chehab wrote:
Hi Sakari,
Em Mon, 8 May 2017 18:03:12 +0300
Sakari Ailus <sakari.ai...@linux.intel.com> escreveu:
Hello,
This is a rebased and partially reworked version of the vb2 cache hints
support patch series posted by first myself, then Laurent and then myself
again.
I'm still posting this as RFC primarily because more testing and driver
changes will be needed. In particular, a lot of platform drivers assume
non-coherent memory but are not properly labelled as such.
The main issue I see is that, if the driver doesn't "annotate" if it
is requiring coherent or non-coherent memory, VB2 should be preserving
its old behavior, as, otherwise, it will risk causing regressions.
Some of the assumptions in VB2 mirror the particular design choices made
in ARM DMA API implementation. This was found out during the review. The
set requires further work in order to be mergeable to get around these
issues, until then this remains in RFC stage.
I posted the three first patches separately --- these do not change how
cache management works.
--
Kind regards,
Sakari Ailus
sakari.ai...@linux.intel.com
