Kevin,
>
>OK, I'm not extremely familar with the whole video architecture here,
>but are all of these drivers expected to be doing clk_get() and
>clk_enable()?
>
[MK]Many IPs on DaVinci VPFE would require vpss master clock. So
it is better to do the way I have done in my patch. So it is expected
that clk_get, clk_enable etc are called from other drivers as well.
>I thought the point of moving the clocks into the CCDC driver was so that
>the clock management was done in a single, shared space.
>
[MK] No. The CCDC IP is used across DaVinci and OMAP SOCs. The clock is named
differently on OMAP, but the IP requires two clocks. So we named
them as "master" and "slave" as a generic name. OMAP, patform code will be
mapping master and slave clocks to their respective clocks. We had discussed
this in the email chain.
Murali
>Kevin
>
>>>> Your earlier suggestion was to use as follows :-
>>>>
>>>> - CLK(NULL, "vpss_master", &vpss_master_clk),
>>>> - CLK(NULL, "vpss_slave", &vpss_slave_clk),
>>>> + CLK("vpfe-capture", "master", &vpss_master_clk),
>>>> + CLK("vpfe-capture", "slave", &vpss_slave_clk),
>>>>
>>>> I am not sure if the following will work so that it can be used across
>>>> multiple drivers.
>>>>
>>>> + CLK(NULL, "master", &vpss_master_clk),
>>>> + CLK(NULL, "slave", &vpss_slave_clk),
>>>>
>>>> If yes, I can re-do this patch. Please confirm.
>>>
>>>No, this will not work. You need a dev_id field so that matching
>>>is done using the struct device.
>>>
>>>My original suggestion was when you had the VPFE driver doing the
>>>clk_get(). Now that it's in CCDC, maybe it should look like this.
>>>
>>>- CLK(NULL, "vpss_master", &vpss_master_clk),
>>>- CLK(NULL, "vpss_slave", &vpss_slave_clk),
>>>+ CLK("ccdc", "master", &vpss_master_clk),
>>>+ CLK("ccdc", "slave", &vpss_slave_clk),
>>>
>>>Kevin
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