Hi Guennadi and Laurent,
We are now evaluating another ST platform that supports a image
co-processor between the camera sensor and the camera host (SoC).
The simple architecture diagram will be similar to one shown below
(for the sake of simplicity I show only a single sensor. At least
two sensors can be supported by the co-processor):
----------------CSI-2 interface ------------------------ CSI2 interface
------------------
|Camera sensor |<---------------> |CSI2 CSI2
|<-------=------> |SoC (ARM Based) |
| 0 | |serial serial|
| |
| | |receiver transmitter
| | |
| |CCI Interface |
| | |
| |<---------------> |CCI CCI
|CCI/I2C Interface| |
| | |master slave
|<--------------> | |
---------------- |
| | |
|
|SYNC signals | |
| ITU
|---------------> | |
| CCIR |Pixel
CLK | |
|
Interface|---------------> | |
|
|ITU Data | |
|
|---------------> | |
|Image video |
| |
|Processor processing|
| |
| logic
| | |
-------------------------
-------------------
The co-processor supports a video progressing logic engine capable of
performing a variety of operations like image recovery, cropping, scaling,
gamma correction etc.
Now, evaluating the framework available for supporting for the camera
host, sensor and co-processor, I am wondering whether soc-camera(v4l2) can
support this complex design or something similar to the ISP driver written
for OMAP is the way forward.
Any pointers on the same and reference links to some documentation
will be highly appreciated.
Thanks for your help,
Regards,
Bhupesh
ST Microelectonics
--
To unsubscribe from this list: send the line "unsubscribe linux-media" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
