On Mon, 29 Apr 2013 15:26:18 +0300
Timo Teras <timo.te...@iki.fi> wrote:
> > > When comparing these two picture, you see that the frame is offset
> > > with one or two pixels in x-direction. Perhaps this is a byte
> > > offset, and in RGB format causes color values to be connected to
> > > wrong pixel.
> > >
> > > As final note, now I hooked the device on faster machine, and the
> > > AC97 detection seems random. It seemed to work with the slower
> > > machine reliably after I had it do the saa7113 initialization. So
> > > sounds like some sort of timing issue.
> >
> > More details please. ;)
> > Do you mean that "Config register raw data" (see dmesg output) value
> > varies ?
>
> I traced the USB init sequence that windows does. It is as follows
> (simplified by removing some other register / eeprom reads):
> em28xx_write_reg(dev, EM28XX_R08_GPIO, 0xff);
> msleep(20);
> em28xx_write_reg(dev, EM28XX_R08_GPIO, 0xfd);
> msleep(100);
> em28xx_write_reg(dev, EM28XX_R08_GPIO, 0x7d);
> msleep(60);
> em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x24);
> em28xx_write_reg(dev, 0x0d, 0x42);
>
> Will test if it makes the detection of the audio chip more reliable.
The patch added is below. Seems that detecting the audio chip is now a
lot more reliable. So far I have not seen failures. Not sure if the
GPIO twidling drives something - or if it's just the additional delay
fixing things.
--- a/drivers/media/usb/em28xx/em28xx-cards.c
+++ b/drivers/media/usb/em28xx/em28xx-cards.c
@@ -2479,6 +2479,19 @@
em28xx_write_reg(dev, EM28XX_R08_GPIO, 0xfd);
msleep(70);
break;
+
+ case EM2860_BOARD_TERRATEC_GRABBY:
+ em28xx_write_reg(dev, EM28XX_R08_GPIO, 0xff);
+ msleep(20);
+ em28xx_write_reg(dev, EM28XX_R08_GPIO, 0xfd);
+ msleep(100);
+ em28xx_write_reg(dev, EM28XX_R08_GPIO, 0xfd);
+ msleep(100);
+ em28xx_write_reg(dev, EM28XX_R08_GPIO, 0x7d);
+ msleep(60);
+ em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x24);
+ em28xx_write_reg(dev, 0x0d, 0x42);
+ break;
}
em28xx_gpio_set(dev, dev->board.tuner_gpio);
--
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