On Mon, May 10, 1999 at 08:56:40PM +0200, Ulf Carlsson wrote: > I've found a silly bug in the R4600SC caching routines. It wiped the > whole cache at wrap arounds even if you just tried to write back two > cache lines (for example the last cache line and the first cache > line). > > I can't understand how this bug has lasted so long in the > kernel. Well, now that I've sorted it out, your R4600SC machine be A > LOT faster. The asm constraints are wrong as well, will commit a path. Ralf
