Hi, On Thu, May 05 2011, Arindam Nath wrote: > We decide on the current limit to be set for the card based on the > Capability of Host Controller to provide current at 1.8V signalling, > and the maximum current limit of the card as indicated by CMD6 > mode 0. We then set the current limit for the card using CMD6 mode 1. > As per the Physical Layer Spec v3.01, the current limit switch is > only applicable for SDR50, SDR104, and DDR50 bus speed modes. For > other UHS-I modes, we set the default current limit of 200mA. > > Signed-off-by: Arindam Nath <arindam.n...@amd.com> > Reviewed-by: Philip Rakity <prak...@marvell.com> > Tested-by: Philip Rakity <prak...@marvell.com>
Thanks, pushed to mmc-next for .40. - Chris. -- Chris Ball <c...@laptop.org> <http://printf.net/> One Laptop Per Child -- To unsubscribe from this list: send the line "unsubscribe linux-mmc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
