On Fri, Dec 14, 2012 at 6:11 PM, Russell King - ARM Linux
<li...@arm.linux.org.uk> wrote:
> On Fri, Dec 14, 2012 at 03:38:46PM +0000, Pawel Moll wrote:
>> The Versatile Express IOFPGA as shipped on VECD 5.0 (bitfiles v108/208
>> and v116/216) contains a modified version of the PL180 MMCI, with
>> PeriphID Configuration value changed to 0x2.
>>
>> This version adds an optional "hardware flow control" feature. When
>> enabled MMC card clock will be automatically disabled when FIFO is
>> about to over/underflow and re-enabled once the host retrieved some
>> data. This makes the controller immune to over/underrun errors caused
>> by big interrupt handling latencies.
>
> Wrong.  It doesn't make it "immune", it just makes it less likely to
> occur - you just need a heavier workload to provoke it.

That'd be what just adding DMA would do (Pawel mentioned this
being cooked for the Vexpress as well I think).

Yours,
Linus Walleij
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