Hi Jaehoo,
On 10/15/13 1:51 AM, Jaehoon Chung wrote:
Hi Dinh,
On 10/15/2013 04:47 AM, dingu...@altera.com wrote:
From: Dinh Nguyen <dingu...@altera.com>
Add functionality in the System Manager to set the SDR settings for the
SD/MMC IP.
Signed-off-by: Dinh Nguyen <dingu...@altera.com>
Cc: Pavel Machek <pa...@denx.de>
CC: Arnd Bergmann <a...@arndb.de>
CC: Olof Johansson <o...@lixom.net>
Cc: Rob Herring <rob.herr...@calxeda.com>
Cc: Pawel Moll <pawel.m...@arm.com>
Cc: Mark Rutland <mark.rutl...@arm.com>
Cc: Stephen Warren <swar...@wwwdotorg.org>
Cc: Ian Campbell <ian.campb...@citrix.com>
Cc: Chris Ball <c...@laptop.org>
Cc: Jaehoon Chung <jh80.ch...@samsung.com>
Cc: Seungwon Jeon <tgih....@samsung.com>
Cc: devicet...@vger.kernel.org
Cc: linux-mmc@vger.kernel.org
CC: linux-arm-ker...@lists.infradead.org
---
v2:
- Have socfpga_sysmgr_set_dwmmc_drvsel_smpsel() take in the SDR settings
directly so that it does not have to walk the DTB.
---
arch/arm/mach-socfpga/Makefile | 2 +-
arch/arm/mach-socfpga/core.h | 6 ++++++
arch/arm/mach-socfpga/system_mgr.c | 28 ++++++++++++++++++++++++++++
3 files changed, 35 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/mach-socfpga/system_mgr.c
diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-socfpga/Makefile
index 6dd7a93..e4ff8b9 100644
--- a/arch/arm/mach-socfpga/Makefile
+++ b/arch/arm/mach-socfpga/Makefile
@@ -2,5 +2,5 @@
# Makefile for the linux kernel.
#
-obj-y := socfpga.o
+obj-y := socfpga.o system_mgr.o
obj-$(CONFIG_SMP) += headsmp.o platsmp.o
diff --git a/arch/arm/mach-socfpga/core.h b/arch/arm/mach-socfpga/core.h
index 572b8f7..b05fa6a 100644
--- a/arch/arm/mach-socfpga/core.h
+++ b/arch/arm/mach-socfpga/core.h
@@ -44,4 +44,10 @@ extern unsigned long cpu1start_addr;
#define SOCFPGA_SCU_VIRT_BASE 0xfffec000
+/* SDMMC Group for System Manager defines */
+#define SYSMGR_SDMMCGRP_CTRL_OFFSET 0x108
+#define DRV_CLK_PHASE_SHIFT_SEL_MASK 0x7
I didn't see where this define is used. When do this use?
It's not used at all. I will remove.
Thanks for the review.
Dinh
Best Regards,
Jaehoon Chung
+#define SYSMGR_SDMMC_CTRL_SET(smplsel, drvsel) \
+ ((((smplsel) & 0x7) << 3) | (((drvsel) & 0x7) << 0))
+
#endif
diff --git a/arch/arm/mach-socfpga/system_mgr.c
b/arch/arm/mach-socfpga/system_mgr.c
new file mode 100644
index 0000000..9fdce1d
--- /dev/null
+++ b/arch/arm/mach-socfpga/system_mgr.c
@@ -0,0 +1,28 @@
+/*
+ * Copyright Altera Corporation (C) 2013. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+#include <linux/of_platform.h>
+#include <asm/mach/map.h>
+
+#include "core.h"
+
+void socfpga_sysmgr_set_dwmmc_drvsel_smpsel(u32 drvsel, u32 smplsel)
+{
+ u32 hs_timing;
+
+ hs_timing = SYSMGR_SDMMC_CTRL_SET(smplsel, drvsel);
+ writel(hs_timing, sys_manager_base_addr + SYSMGR_SDMMCGRP_CTRL_OFFSET);
+}
+EXPORT_SYMBOL(socfpga_sysmgr_set_dwmmc_drvsel_smpsel);
--
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