On 10/30/2014 12:36 AM, Scott Branden wrote:
> The bcm2835 has clock domain issues when back to back writes to certain
> registers are written. The existing driver works around this issue with
> udelay. A more efficient method is to store the 8 and 16 bit writes
> to the registers affected and then write them as 32 bits at the appropriate
> time.
> diff --git a/drivers/mmc/host/sdhci-bcm2835.c
> b/drivers/mmc/host/sdhci-bcm2835.c
> static void bcm2835_sdhci_writew(struct sdhci_host *host, u16 val, int reg)
> {
> struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
> - struct bcm2835_sdhci *bcm2835_host = pltfm_host->priv;
> - u32 oldval = (reg == SDHCI_COMMAND) ? bcm2835_host->shadow :
> - bcm2835_sdhci_readl(host, reg & ~3);
> + struct bcm2835_sdhci_host *bcm2835_host = pltfm_host->priv;
Is that type change for bcm2835_host really correct?
> + } else {
> + /* Read reg, all other registers are not shadowed */
> + oldval = readl(host->ioaddr + (reg & ~3));
Is there any reason to use readl() directly here rather than calling
bcm2835_readl()? ...
> static void bcm2835_sdhci_writeb(struct sdhci_host *host, u8 val, int reg)
> {
> - u32 oldval = bcm2835_sdhci_readl(host, reg & ~3);
> + u32 oldval = readl(host->ioaddr + (reg & ~3));
... and here in particular, since this seems like an unrelated change?
> static int bcm2835_sdhci_probe(struct platform_device *pdev)
> {
> struct sdhci_host *host;
> - struct bcm2835_sdhci *bcm2835_host;
> + struct bcm2835_sdhci_host *bcm2835_host;
Is that type change for bcm2835_host really correct?
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