On 14 June 2015 at 19:22, Yoshihiro Kaneko <ykaneko0...@gmail.com> wrote:
> From: Koji Matsuoka <koji.matsuoka...@renesas.com>
>
> The clock should be enable when SDHI registers are accessed.
>
> Signed-off-by: Koji Matsuoka <koji.matsuoka...@renesas.com>
> Signed-off-by: Yoshihiro Kaneko <ykaneko0...@gmail.com>
> ---
>
> This patch is based on mmc-next branch of Ulf Hansson's mmc tree.
>
> * Perhaps this relates to the need to enhance clock management
>
>  drivers/mmc/host/tmio_mmc_pio.c | 2 ++
>  1 file changed, 2 insertions(+)
>
> diff --git a/drivers/mmc/host/tmio_mmc_pio.c b/drivers/mmc/host/tmio_mmc_pio.c
> index e3dcf31..ec10bcd 100644
> --- a/drivers/mmc/host/tmio_mmc_pio.c
> +++ b/drivers/mmc/host/tmio_mmc_pio.c
> @@ -1240,7 +1240,9 @@ int tmio_mmc_host_runtime_suspend(struct device *dev)
>         struct mmc_host *mmc = dev_get_drvdata(dev);
>         struct tmio_mmc_host *host = mmc_priv(mmc);
>
> +       pm_runtime_get_sync(dev);

I don't recommend doing a pm_runtime_get_sync() from your
->runtime_suspend() callback. There a often cases where this can
deadlock.

Anyway, isn't the clock already enabled here?

>         tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_ALL);
> +       pm_runtime_put(dev);
>
>         if (host->clk_cache)
>                 tmio_mmc_clk_stop(host);
> --
> 1.9.1
>

Kind regards
Uffe
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