omap3_noncore_dpll_enable() calls clk_get_rate(), which causes an attempt
to re-enter the clockfw_lock spinlock. Fix by calling
omap2_get_dpll_rate() instead.
Signed-off-by: Paul Walmsley <[EMAIL PROTECTED]>
---
arch/arm/mach-omap2/clock34xx.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
index 670c945..71357db 100644
--- a/arch/arm/mach-omap2/clock34xx.c
+++ b/arch/arm/mach-omap2/clock34xx.c
@@ -273,7 +273,7 @@ static int omap3_noncore_dpll_enable(struct clk *clk)
if (clk == &dpll3_ck)
return -EINVAL;
- if (clk->parent->rate == clk_get_rate(clk))
+ if (clk->parent->rate == omap2_get_dpll_rate(clk))
r = _omap3_noncore_dpll_bypass(clk);
else
r = _omap3_noncore_dpll_lock(clk);
--
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