Signed-off-by: Swaminathan S <[EMAIL PROTECTED]>
This patch adds tasklet structures to musb to enable
polling for FIFO empty status on the Mentor TX FIFO.
This is requried to enable proper functioning of
DaVinci CPPI TX DMA when performing Tx transfers.
diff --git a/drivers/usb/musb/musb_core.h b/drivers/usb/musb/musb_core.h
index 2096469..804caaf 100644
--- a/drivers/usb/musb/musb_core.h
+++ b/drivers/usb/musb/musb_core.h
@@ -273,6 +273,9 @@ struct musb_hw_ep {
u8 rx_reinit;
u8 tx_reinit;
+#ifdef CONFIG_ARCH_DAVINCI
+ u8 fifo_flush_check; /* Check FIFO empty */
+#endif
#endif
#ifdef CONFIG_USB_GADGET_MUSB_HDRC
@@ -331,6 +334,9 @@ struct musb {
struct list_head in_bulk; /* of musb_qh */
struct list_head out_bulk; /* of musb_qh */
struct musb_qh *periodic[32]; /* tree of interrupt+iso */
+#ifdef CONFIG_ARCH_DAVINCI
+ struct tasklet_struct fifo_check; /* FIFO empty check tasklet */
+#endif
#endif
/* called with IRQs blocked; ON/nonzero implies starting a session,
diff --git a/drivers/usb/musb/musb_host.h b/drivers/usb/musb/musb_host.h
index 77bcdb9..29e1863 100644
--- a/drivers/usb/musb/musb_host.h
+++ b/drivers/usb/musb/musb_host.h
@@ -69,6 +69,7 @@ struct musb_qh {
u16 maxpacket;
u16 frame; /* for periodic schedule */
unsigned iso_idx; /* in urb->iso_frame_desc[] */
+ u8 num_req; /* Number of active requests */
};
/* map from control or bulk queue head to the first qh on that ring */
@@ -89,6 +90,10 @@ extern int musb_hub_control(struct usb_hcd *hcd,
u16 typeReq, u16 wValue, u16 wIndex,
char *buf, u16 wLength);
+#ifdef CONFIG_ARCH_DAVINCI
+extern void musb_fifo_check_tasklet(unsigned long data);
+#endif
+
extern const struct hc_driver musb_hc_driver;
static inline struct urb *next_urb(struct musb_qh *qh)
--
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