Hi,
> > The usage in TI kernels has varied a bit. Some times they are just
> > load and lock TLB's, for others table walking can be enabled. In
> > all cases if a table walk miss happens it is fatal and the IP block
> > device will have to be reset.
>
> In *theory*, from this IOMMU hardware perspective, it's feasible to
> load something on memory dynamically("on-demand loading") when a table
> walk miss happens by notifying it to some memory manager through
> its assigned interrupt. Practically this latency may be a problem in
> some cases;)
I've been told explicitly by a few people that a table miss is fatal and the
block needs to be reset to recover state.
I've not personally dug into TRM and underlying functional specs to validate
this. It might be different per IP. Extreme case some kind of checkpoint
would work ;)
In some discussions some people have even taken in table walk time as a
consideration if certain camera streaming cases will work. So, your comment
about latency seems on.
Regards,
Richard W.
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