On Mon, 14 Jul 2014, Kishon Vijay Abraham I wrote:

> On Wednesday 09 July 2014 04:32 PM, Rajendra Nayak wrote:
> > On Wednesday 09 July 2014 02:32 PM, Kishon Vijay Abraham I wrote:
> >> Added hwmod data for pcie1 and pcie2 subsystem present in DRA7xx SOC.
> >>
> >> Cc: Tony Lindgren <t...@atomide.com>
> >> Cc: Russell King <li...@arm.linux.org.uk>
> >> Cc: Paul Walmsley <p...@pwsan.com>
> >> Signed-off-by: Kishon Vijay Abraham I <kis...@ti.com>
> >> Tested-by: Kishon Vijay Abraham I <kis...@ti.com>
> >> ---
> >> Changes from v1:
> >> * changed the clock domain to "pcie_clkdm"
> >> * Added PCIe as a slave port for l3_main.
> > 
> > Looks good to me,
> > Reviewed-by: Rajendra Nayak <rna...@ti.com>
> 
> Paul,
> 
> Can you pick this one?

Yep, queued for 3.17.

- Paul
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