Tomi, On 05/01/15 11:18, Tomi Valkeinen wrote: > Hi Roger, > > On 14/11/14 20:09, Marc Kleine-Budde wrote: >> From: Roger Quadros <rog...@ti.com> >> >> Some TI SoCs like DRA7 have a RAMINIT register specification >> different from the other AMxx SoCs and as expected by the >> existing driver. >> >> To add more insanity, this register is shared with other >> IPs like DSS, PCIe and PWM. >> >> Provides a more generic mechanism to specify the RAMINIT >> register location and START/DONE bit position and use the >> syscon/regmap framework to access the register. > > This patch updates the syscon regmap using regmap_read + regmap_write. > That's not a safe way to update the bits, as some other driver may touch > the register between the read and write. The change has to be made using > regmap_update_bits. > > We don't have other drivers using the register at the moment, but I > presume we will sooner or later.
I remember updating this after you pointed it out to me earlier, but it seems I picked up the older version while sending. :(. Thanks for pointing it again. I'll prepare a fix on top. cheers, -roger -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
