On Mon, Nov 30, 2015 at 10:45:11AM +0530, Vignesh R wrote: > In addition to providing direct access to SPI bus, some spi controller > hardwares (like ti-qspi) provide special port (like memory mapped port) > that are optimized to improve SPI flash read performance.
I'm reasonably OK with this from the SPI side but I'd really like to see people working on MTD say that this makes sense.
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