On Thu, May 21, 2009 at 3:37 PM, Paul Walmsley <p...@pwsan.com> wrote:
>
> Hi Kevin
>
> On Wed, 20 May 2009, Kevin Hilman wrote:
>
> > diff --git a/arch/arm/mach-omap2/sdrc.c b/arch/arm/mach-omap2/sdrc.c
> > index c832d83..d7807e2 100644
> > --- a/arch/arm/mach-omap2/sdrc.c
> > +++ b/arch/arm/mach-omap2/sdrc.c
> > @@ -136,5 +136,13 @@ void __init omap2_sdrc_init(struct omap_sdrc_params
> > *sp)
> > (1 << SDRC_POWER_PWDENA_SHIFT) |
> > (1 << SDRC_POWER_PAGEPOLICY_SHIFT);
> > sdrc_write_reg(l, SDRC_POWER);
> > +
> > + /* Ensure SDRC pins for both chip selcts are mux'd properly
> > + * for self-refresh */
> > + if (cpu_is_omap34xx()) {
> > + omap_cfg_reg(H16_34XX_SDRC_CKE0);
> > + omap_cfg_reg(H17_34XX_SDRC_CKE1);
> > + }
> > +
> > omap2_sms_save_context();
> > }
>
> would suggest keeping pin remuxing in board-*.c or maybe chip-*.c files;
> ideally this file would only pertain to the SDRC IP block itself.
>
>
> - Paul
Is there a reason why any board-*.c would not want this? It seems a
little silly for everyone to be doing the same repetitive pin muxing
if they want to suspend properly for a reasonable amount of time.
- Mike
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