On 12/03/2009 11:57 AM, Weng, Wending wrote:
Hi,
In the u-boot for omap3evm I use, cleanup_before_linux(in
cpu/omap3/cpu.c or cpu/arm_cortexa8/cpu.c) turns off L2 cache by mistake, it
should not. This causes serious performance problem for me.
The following line "#ifndef CONFIG_L2_OFF" should be "#ifdef
CONFIG_L2_OFF".
#ifndef CONFIG_L2_OFF
/* turn off L2 cache */
l2cache_disable();
/* invalidate L2 cache also */
v7_flush_dcache_all(get_device_type());
#endif
Are you sure? The version I have re-enables the L2 cache just a
few lines below that:
==================================================================
#ifndef CONFIG_L2_OFF
/* turn off L2 cache */
l2_cache_disable();
/* invalidate L2 cache also */
v7_flush_dcache_all(get_device_type());
#endif
i = 0;
/* mem barrier to sync up things */
asm("mcr p15, 0, %0, c7, c10, 4": :"r"(i));
#ifndef CONFIG_L2_OFF
l2_cache_enable();
#endif
==================================================================
n.b. I'm using git://git.denx.de/u-boot.git
-----Original Message-----
From: Pandita, Vikram [mailto:vikram.pand...@ti.com]
Sent: December 3, 2009 1:40 PM
To: Weng, Wending; linux-omap@vger.kernel.org; Tom
Subject: RE: u-boot for omap3
-----Original Message-----
From: linux-omap-ow...@vger.kernel.org
[mailto:linux-omap-ow...@vger.kernel.org] On Behalf Of Weng,
Wending
Sent: Thursday, December 03, 2009 12:32 PM
To: linux-omap@vger.kernel.org
Subject: u-boot for omap3
Hi all,
Anybody knows who takes care of u-boot for omap3, I wish to fix a L2
cahe related bug if
Tom Rix is the Arm u-boot maintainer.
Omap3 falls as one of the silicon he maintains.
In reality, there are always internal/forked versions of the upstream that get
used.
Like for zoom boards I maintain it at dev.omapzoom.org /bootloader/*
it's
not done yet.
Regards
Wending
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Gary Thomas | Consulting for the
MLB Associates | Embedded world
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