On Mon, 5 Apr 2010, Sripathy, Vishwanath wrote: > > -----Original Message----- > > From: Paul Walmsley [mailto:p...@pwsan.com] > > > > On Thu, 1 Apr 2010, Vishwanath BS wrote: > > > > > diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach- > > omap2/clock3xxx_data.c > > > index d5153b6..d8e57a6 > > > --- a/arch/arm/mach-omap2/clock3xxx_data.c > > > +++ b/arch/arm/mach-omap2/clock3xxx_data.c > > > @@ -3597,5 +3601,13 @@ int __init omap3xxx_clk_init(void) > > > sdrc_ick_p = clk_get(NULL, "sdrc_ick"); > > > arm_fck_p = clk_get(NULL, "arm_fck"); > > > > > > + /* Set the bypass clock dividers for DPLL1 and DPLL2 */ > > > + if (cpu_is_omap3630()) { > > > + clk_set_rate(&dpll1_fck, 400000000/2); > > > + clk_set_rate(&dpll2_fck, 400000000/2); > > > + } else { > > > + clk_set_rate(&dpll1_fck, 332000000/4); > > > + clk_set_rate(&dpll2_fck, 332000000/4); > > > + } > > > > This code is highly OPP-specific. Why is this code needed here? > > Shouldn't the code in resource34xx.c be sufficient? > > Code in resource34xx.c will be executed only when DVFS is executed. > However above code makes sure that initial values of Bypass clock > dividers are good. This will ensure that even if DVFS is disabled, > IVA/MPU are never overclocked when they enter bypass mode.
My point is that you don't know how the bootloader has configured the system at the point when this code executes. You don't know what voltage level VDD1 and VDD2 are at; you don't know what state the clock tree is in. You only know this when you change OPPs. And the selection of the OPP at startup is use-case dependent. So as far as I can tell, this code shouldn't be there. If you want to do something like this, then you should add some generic way (e.g., a kernel command line parameter) to set the VDD1 and VDD2 OPPs at boot. - Paul -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
