Hi, > -----Original Message----- > From: Hiroshi DOYU [mailto:[email protected]] > Sent: Monday, April 19, 2010 1:50 AM > To: Kanigeri, Hari; [email protected]; [email protected] > Cc: [email protected]; Shilimkar, Santosh; [email protected] > Subject: Re: [PATCH] ARM:iommu support for OMAP4 > > Hi Hari, > > From: "ext Kanigeri, Hari" <[email protected]> > Subject: [PATCH] ARM:iommu support for OMAP4 > Date: Fri, 16 Apr 2010 18:17:09 +0200 > > > From 708914e1a82a608d423b050cb31b4deb46eb8411 Mon Sep 17 00:00:00 2001 > > From: Hari Kanigeri <[email protected]> > > Date: Mon, 8 Mar 2010 17:55:21 -0600 > > Subject: [PATCH] ARM:iommu support for OMAP4 > > > > This patch provides the iommu support for OMAP4 co-processors. > > This looks ok for now mostly. some minor fix are pointed out by > Santosh, though. > > In the long run, I guess that, this should be converted to "hwmod"? > > ref: http://marc.info/?l=linux-omap&m=127012520411256&w=2
Looks like for OMAP4 we currently don't have the mechanism to manage the 3 resets to Ducati (MMU, M3_0, M3_1) independently and they are all tied to one hwmod (ducati). I didn't check the OMAP3 implementation but hopefully the reset lines for MMU and IVA are not tied to one hwmod. We would need independent control over these reset pins as RST3 (MMU) will be needed for programming MMU prior to bringing cores out of reset, RST_1 will be needed to control just M3_0 core, and RST_2 will be needed for M3_1. I think until this change is done it will be difficult to migrate to hwmod for iommu. Thank you, Best regards, Hari -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
