OMAP4 has a local PRCM (for individual CPU control) block.
Hence add a new prcm_mpu_base to handle this in the omap_globals
structure.
Signed-off-by: Rajendra Nayak <rna...@ti.com>
Cc: Kevin Hilman <khil...@deeprootsystems.com>
Cc: Paul Walmsley <p...@pwsan.com>
Cc: Benoit Cousson <b-cous...@ti.com>
---
arch/arm/mach-omap2/prcm.c | 5 +++++
arch/arm/plat-omap/common.c | 1 +
arch/arm/plat-omap/include/plat/common.h | 1 +
3 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c
index c201374..4df30d0 100644
--- a/arch/arm/mach-omap2/prcm.c
+++ b/arch/arm/mach-omap2/prcm.c
@@ -35,6 +35,7 @@
#include "prm-regbits-24xx.h"
static void __iomem *prm_base;
+static void __iomem *prcm_mpu_base;
static void __iomem *cm_base;
static void __iomem *cm2_base;
@@ -282,6 +283,10 @@ void __init omap2_set_globals_prcm(struct omap_globals
*omap2_globals)
prm_base = ioremap(omap2_globals->prm, SZ_8K);
WARN_ON(!prm_base);
}
+ if (omap2_globals->prcm_mpu) {
+ prcm_mpu_base = ioremap(omap2_globals->prcm_mpu, SZ_8K);
+ WARN_ON(!prcm_mpu_base);
+ }
if (omap2_globals->cm) {
cm_base = ioremap(omap2_globals->cm, SZ_8K);
WARN_ON(!cm_base);
diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c
index 3008e71..8603a46 100644
--- a/arch/arm/plat-omap/common.c
+++ b/arch/arm/plat-omap/common.c
@@ -338,6 +338,7 @@ static struct omap_globals omap4_globals = {
.tap = OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE),
.ctrl = OMAP443X_CTRL_BASE,
.prm = OMAP4430_PRM_BASE,
+ .prcm_mpu = OMAP4430_PRCM_MPU_BASE,
.cm = OMAP4430_CM_BASE,
.cm2 = OMAP4430_CM2_BASE,
.uart1_phys = OMAP4_UART1_BASE,
diff --git a/arch/arm/plat-omap/include/plat/common.h
b/arch/arm/plat-omap/include/plat/common.h
index 9776b41..47baf9d 100644
--- a/arch/arm/plat-omap/include/plat/common.h
+++ b/arch/arm/plat-omap/include/plat/common.h
@@ -48,6 +48,7 @@ struct omap_globals {
unsigned long sms; /* SDRAM Memory Scheduler */
unsigned long ctrl; /* System Control Module */
unsigned long prm; /* Power and Reset Management */
+ unsigned long prcm_mpu; /* Local MPU PRM */
unsigned long cm; /* Clock Management */
unsigned long cm2;
unsigned long uart1_phys;
--
1.7.0.4
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