> -----Original Message----- > From: Tony Lindgren [mailto:t...@atomide.com] > Sent: Wednesday, September 29, 2010 4:00 AM > To: Ghorai, Sukumar > Cc: linux-omap@vger.kernel.org; linux-...@lists.infradead.org; linux-arm- > ker...@lists.infradead.org; Vimal Singh > Subject: Re: [PATCH v5 2/5] omap3: nand: prefetch in irq mode support > > * Sukumar Ghorai <s-gho...@ti.com> [100927 06:30]: > > This patch enable prefetch-irq mode for NAND. > > > --- a/drivers/mtd/nand/Kconfig > > +++ b/drivers/mtd/nand/Kconfig > > @@ -112,6 +112,9 @@ config MTD_NAND_OMAP_PREFETCH > > help > > The NAND device can be accessed for Read/Write using GPMC PREFETCH > engine > > to improve the performance. > > + GPMC PREFETCH can be configured eigther in MPU interrupt mode or in > DMA > > + interrupt mode. If not selected any of them prefetch will be used > in > > + polling mode. > > > > config MTD_NAND_OMAP_PREFETCH_DMA > > depends on MTD_NAND_OMAP_PREFETCH > > @@ -120,7 +123,16 @@ config MTD_NAND_OMAP_PREFETCH_DMA > > help > > The GPMC PREFETCH engine can be configured eigther in MPU interrupt > mode > > or in DMA interrupt mode. > > - Say y for DMA mode or MPU mode will be used > > + Say y for DMA mode > > + > > +config MTD_NAND_OMAP_PREFETCH_IRQ > > + depends on MTD_NAND_OMAP_PREFETCH && !MTD_NAND_OMAP_PREFETCH_DMA > > + bool "IRQ mode" > > + default n > > + help > > + The GPMC PREFETCH engine can be configured eigther in MPU interrupt > mode > > + or in DMA interrupt mode. > > + Say y for IRQ mode > > > > config MTD_NAND_IDS > > tristate > > The configuration to use the prefetch IRQ should be passed in the > platform_data > from the board-*.c files. What if you want to to boot a distro kernel on > omap2, 3 and 4 and only some of the boards can use the prefetch interrupt? [Ghorai] thanks.. we will provide the interface to select the io mode and ecc mode from board file.
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