DMA4 channel fails to continue with descriptor load when
pause bit is cleared through config port access while in
mstandby.
Work around: Software should configure DMA in no standby mode
or force standby before clearing the pause bit(CDPi[7]) using
mstandby mode control API's.
Applicable for all versions of OMAP3630 silicons.
Signed-off-by: G, Manjunath Kondaiah <manj...@ti.com>
Cc: linux-arm-ker...@lists.infradead.org
Cc: Kevin Hilman <khil...@deeprootsystems.com>
Cc: Tony Lindgren <t...@atomide.com>
Cc: Santosh Shilimkar <santosh.shilim...@ti.com>
Cc: Benoit Cousson <b-cous...@ti.com>
---
arch/arm/mach-omap2/dma.c | 18 ++++++++++++++++++
arch/arm/plat-omap/include/plat/dma.h | 1 +
2 files changed, 19 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/dma.c b/arch/arm/mach-omap2/dma.c
index 290b40c..86c8d20 100644
--- a/arch/arm/mach-omap2/dma.c
+++ b/arch/arm/mach-omap2/dma.c
@@ -689,6 +689,17 @@ static u32 configure_dma_errata(void)
if (cpu_is_omap34xx() && (omap_type() != OMAP2_DEVICE_TYPE_GP))
SET_DMA_ERRATA(DMA_ROMCODE_BUG);
+ /*
+ * Erratum i557 - DMA4 channel fails to continue with descriptor load
+ * when pause bit is cleared through config port access while in
+ * standby.
+ * Work around: Software should configure DMA in no standby mode or
+ * Force standby before clearing the pause bit(CDPi[7]).
+ * Applicable for all versions of OMAP3630 silicons.
+ */
+ if (cpu_is_omap3630())
+ SET_DMA_ERRATA(DMA_ERRATA_i557);
+
return errata;
}
@@ -1431,12 +1442,19 @@ int omap_resume_dma_sglist_transfers(int lch, int
pauseafter)
*/
wmb();
+ if (IS_DMA_ERRATA(DMA_ERRATA_i557))
+ omap_device_require_no_mstandby(pd);
+
/* Clear pause bit in CDP */
l = dma_read(CDP, lch);
l &= ~(DMA_LIST_CDP_PAUSEMODE);
dma_write(l, CDP, lch);
omap_start_dma(lch);
+
+ if (IS_DMA_ERRATA(DMA_ERRATA_i88))
+ omap_device_release_no_mstandby(pd);
+
return 0;
}
EXPORT_SYMBOL(omap_resume_dma_sglist_transfers);
diff --git a/arch/arm/plat-omap/include/plat/dma.h
b/arch/arm/plat-omap/include/plat/dma.h
index fd378f6..e18603d 100644
--- a/arch/arm/plat-omap/include/plat/dma.h
+++ b/arch/arm/plat-omap/include/plat/dma.h
@@ -285,6 +285,7 @@
#define DMA_ERRATA_i88 BIT(0x4)
#define DMA_ERRATA_3_3 BIT(0x5)
#define DMA_ROMCODE_BUG BIT(0x6)
+#define DMA_ERRATA_i557 BIT(0x7)
/* Attributes for OMAP DMA Contrller */
#define DMA_LINKED_LCH BIT(0x0)
--
1.7.1
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