Add omap3 soc file for handling omap3 soc i2c controllers existing on l4-core bus.
Signed-off-by: G, Manjunath Kondaiah <manj...@ti.com> --- arch/arm/boot/dts/omap3.dtsi | 62 ++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 62 insertions(+), 0 deletions(-) create mode 100644 arch/arm/boot/dts/omap3.dtsi diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi new file mode 100644 index 0000000..9ea8257 --- /dev/null +++ b/arch/arm/boot/dts/omap3.dtsi @@ -0,0 +1,62 @@ +/* + * Device Tree Source for OMAP3 SoC + * + * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +/dts-v1/; +/include/ "skeleton.dtsi" + +/ { + #address-cells = <1>; + #size-cells = <1>; + model = "ti,omap3"; + + aliases { + i2c1 = &i2c1; + i2c2 = &i2c2; + i2c3 = &i2c3; + }; + + l4-core { + compatible = "ti,omap3-l4-core", "sonics,s3220"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x48000000 0x1000000>; + + i2c1: i2c@70000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "ti,omap-i2c"; + reg = <0x70000 0x100>; + interrupts = < 88 >; + }; + + i2c2: i2c@72000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "ti,omap-i2c"; + reg = <0x72000 0x100>; + interrupts = < 89 >; + }; + + i2c3: i2c@60000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "ti,omap-i2c"; + reg = <0x60000 0x100>; + interrupts = < 93 >; + }; + }; + + l4-per { + compatible = "ti,l4-per"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x49000000 0x100000>; + }; +}; -- 1.7.4.1 -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
