Hi Santosh,
On Thu, 8 Sep 2011, Santosh Shilimkar wrote:
> Local timer clock is sourced from the CPU clock and hence changes
> along with CPU clock. These per CPU local timers are used as
> clock-events, so they need to be reconfigured on CPU frequency
> change as part of CPUfreq governor.
>
> Newly introduced clockevents_reconfigure() needs to know the
> twd clock-rate. Provide a clock-node to make clk_get_rate() work
> for TWD.
>
> Signed-off-by: Santosh Shilimkar <santosh.shilim...@ti.com>
> Cc: Paul Walmsley <p...@pwsan.com>
> Cc: Kevin Hilman <khil...@ti.com>
This clock looks like the ARM Cortex-A9 MPCore PERIPHCLK, correct? From
ARM Cortex-A9 MPCore Technical Reference Manual (DDI 0407G) Section 5.1
"Clocks"?
Assuming that is so, I've modified this patch appropriately, and added
support to the autogeneration script to generate this clock node.
Care to take a quick look at it to make sure it's okay?
- Paul
From: Santosh Shilimkar <santosh.shilim...@ti.com>
Date: Thu, 8 Sep 2011 10:52:06 +0530
Subject: [PATCH] ARM: OMAP4: clock: Add CPU local timer clock node.
Local timer clock is sourced from the CPU clock and hence changes
along with CPU clock. These per CPU local timers are used as
clock-events, so they need to be reconfigured on CPU frequency
change as part of CPUfreq governor.
Newly introduced clockevents_reconfigure() needs to know the
twd clock-rate. Provide a clock-node to make clk_get_rate() work
for TWD.
Signed-off-by: Santosh Shilimkar <santosh.shilim...@ti.com>
Cc: Paul Walmsley <p...@pwsan.com>
Cc: Kevin Hilman <khil...@ti.com>
[p...@pwsan.com: renamed clock node to 'mpu_periphclk' to indicate that this
is the Cortex-A9 MPCore subsystem clock PERIPHCLK (DDI 0407G); moved
clock and clkdev entries to match the autogenerated script output]
Signed-off-by: Paul Walmsley <p...@pwsan.com>
---
arch/arm/mach-omap2/clock44xx_data.c | 9 +++++++++
1 files changed, 9 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/clock44xx_data.c
b/arch/arm/mach-omap2/clock44xx_data.c
index 4873c00..9684233 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -1195,6 +1195,14 @@ static struct clk l4_wkup_clk_mux_ck = {
.recalc = &omap2_clksel_recalc,
};
+static struct clk mpu_periphclk = {
+ .name = "mpu_periphclk",
+ .parent = &dpll_mpu_ck,
+ .ops = &clkops_null,
+ .fixed_div = 2,
+ .recalc = &omap_fixed_divisor_recalc,
+};
+
static const struct clksel_rate div2_2to1_rates[] = {
{ .div = 1, .val = 1, .flags = RATE_IN_4430 },
{ .div = 2, .val = 0, .flags = RATE_IN_4430 },
@@ -3189,6 +3197,7 @@ static struct omap_clk omap44xx_clks[] = {
CLK(NULL, "l4_div_ck", &l4_div_ck,
CK_443X),
CLK(NULL, "lp_clk_div_ck", &lp_clk_div_ck,
CK_443X),
CLK(NULL, "l4_wkup_clk_mux_ck", &l4_wkup_clk_mux_ck,
CK_443X),
+ CLK(NULL, "smp_twd", &mpu_periphclk,
CK_443X),
CLK(NULL, "ocp_abe_iclk", &ocp_abe_iclk,
CK_443X),
CLK(NULL, "per_abe_24m_fclk", &per_abe_24m_fclk,
CK_443X),
CLK(NULL, "per_abe_nc_fclk", &per_abe_nc_fclk,
CK_443X),
--
1.7.6.3
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