On Tue, 1 May 2012, Kevin Hilman wrote:

> PER is the one that seems to be causing the most latency.  
> 
> Can you try do your measurements using hack below which makes sure that
> PER isn't any deeper than CORE?

It might be the relock time for DPLL4, the PER DPLL.  You might also 
try disabling DPLL4 autoidle for the shallow C-states...
 

- Paul
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