Hi Tony, Artem,

On Thu, Jun 07, 2012 at 20:44:03, Mohammed, Afzal wrote:

> > This series cleans up gpmc mtd interactions so that GPMC driver
> > conversion which is going to happen shortly would happen smoothly
> > by not creating much disturbance outside of arch/arm/*omap*/
> > 
> > This series,
> > 1. provides the ability for OMAP NAND driver to configure GPMC-NAND
> >    registers by NAND driver itself instead of using exported GPMC
> >    symbols
> > 2. modifies GPMC to provide OMAP ONENAND & NAND drivers with GPMC
> >    allocated address space as resource
> > 3. creates a fictitious GPMC interrupt chip and provide the clients
> >    with interrupts that could be handled using standard APIs (helps
> >    in removing the requirement for driver of peripheral connected to
> >    GPMC having the knowledge about GPMC interrupt handling). The
> >    only user is OMAP NAND driver, it has also been modified to take
> >    advantage of this
> > 
> > This series has been made over 3.5-rc1
> 
> Ping

Please let me know your comments on this. This is a prerequisite for
gpmc driver conversion series [1]

[1] http://www.mail-archive.com/[email protected]/msg69897.html

Regards
Afzal
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