On Wed, Jul 04, 2012 at 03:24:33PM +0530, Santosh Shilimkar wrote:
> ARM arch timers stop in low power state and hence can not wakeup CPUs in
> deeper idle states when used as cloc event devices. Marking these clock event
> devices with C3_STOP so that during lowpower states, the tick is managed by
> wakeup capable broadcast timer.

Will tells me that the arch timers don't stop in low power modes, they
just can't produce wakeup events.  Apparantly the spec says:

   The system counter must be implemented in an always-on power domain.
   Use of lower-frequency modes must not affect the implemented accuracy.

Are you sure your above description of the problem is correct?
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