Hi,

On Wed, Jul 4, 2012 at 4:46 PM, Paul Walmsley <p...@pwsan.com> wrote:
> On Wed, 9 May 2012, Kishon Vijay Abraham I wrote:
>
>> The DMADISABLE bit is a semi-automatic bit present in sysconfig register
>> of some modules. When the DMA must perform read/write accesses, the
>> DMADISABLE bit is cleared by the hardware. But when the DMA must stop for 
>> power
>> management, software must set the DMADISABLE bit back to 1.
>>
>> In cases where the ROMCODE/BOOTLOADER uses dma, the hardware clears the
>> DMADISABLE bit (but the romcode/bootloader might not set it back to 1).
>> In order for the kernel to start in a clean state, it is
>> necessary for the kernel to set DMADISABLE bit back to 1 (irrespective
>> of whether it's been set to 1 in romcode or bootloader).
>>
>> During _reset of the (hwmod)device, the DMADISABLE bit is set so that it
>> does not prevent idling of the system. (NOTE: having DMADISABLE to 0,
>> prevents the system to idle)
>>
>> DMADISABLE bit is present in usbotgss module of omap5.
>>
>> Cc: Benoit Cousson <b-cous...@ti.com>
>> Cc: Kevin Hilman <khil...@ti.com>
>> Cc: Paul Walmsley <p...@pwsan.com>
>> Signed-off-by: Kishon Vijay Abraham I <kis...@ti.com>
>
> Thanks for the detailed comments and the kerneldoc.  This one has been
> updated to apply and also to resolve some checkpatch warnings.  Updated
> patch below.

Thanks :-)

-Kishon
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