Create the sections describing the McBSP ports to be able to use them via
DT.
Signed-off-by: Peter Ujfalusi <peter.ujfal...@ti.com>
---
arch/arm/boot/dts/omap5.dtsi | 36 ++++++++++++++++++++++++++++++++++++
1 files changed, 36 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 57e5270..c5f9242 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -180,5 +180,41 @@
ti,hwmods = "uart6";
clock-frequency = <48000000>;
};
+
+ mcbsp1: mcbsp@40122000 {
+ compatible = "ti,omap4-mcbsp";
+ reg = <0x40122000 0xff>, /* MPU private access */
+ <0x49022000 0xff>; /* L3 Interconnect */
+ reg-names = "mpu", "dma";
+ interrupts = <0 17 0x4>;
+ interrupt-names = "common";
+ interrupt-parent = <&gic>;
+ ti,buffer-size = <128>;
+ ti,hwmods = "mcbsp1";
+ };
+
+ mcbsp2: mcbsp@40124000 {
+ compatible = "ti,omap4-mcbsp";
+ reg = <0x40124000 0xff>, /* MPU private access */
+ <0x49024000 0xff>; /* L3 Interconnect */
+ reg-names = "mpu", "dma";
+ interrupts = <0 22 0x4>;
+ interrupt-names = "common";
+ interrupt-parent = <&gic>;
+ ti,buffer-size = <128>;
+ ti,hwmods = "mcbsp2";
+ };
+
+ mcbsp3: mcbsp@40126000 {
+ compatible = "ti,omap4-mcbsp";
+ reg = <0x40126000 0xff>, /* MPU private access */
+ <0x49026000 0xff>; /* L3 Interconnect */
+ reg-names = "mpu", "dma";
+ interrupts = <0 23 0x4>;
+ interrupt-names = "common";
+ interrupt-parent = <&gic>;
+ ti,buffer-size = <128>;
+ ti,hwmods = "mcbsp3";
+ };
};
};
--
1.7.8.6
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