Hi Mark,
On Tuesday 02 July 2013 03:47 PM, Mark Brown wrote:
On Tue, Jul 02, 2013 at 12:44:04PM +0300, Felipe Balbi wrote:
On Tue, Jul 02, 2013 at 10:32:47AM +0100, Mark Brown wrote:
Does this hardware really support anything other than 8 bits per word?
There is no code in the driver which pays any attention to the word
size...
the HW has a 128-bit shift register ;-) but driver doesn't look
complete.
That's not the issue - remember that SPI specifies big endian byte
ordering for words on the bus so things will need to be reordered by the
hardware for anything except 8 bits.
Yes, I defaulted my driver to assume 8 bits.
I will introduce case by case reads based on t->len
Something like..
case 8:
readb();
case 16:
readw();
case 32:
readl();
~Sourav
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