On Tue, 26 Nov 2013, Tero Kristo wrote:
> This patch creates a unique node for each clock in the DRA7 power,
> reset and clock manager (PRCM).
>
> TODO: apll_pcie clock node is still a dummy in this version, and
> proper support for the APLL should be added.
...
> ---
> arch/arm/boot/dts/dra7.dtsi | 23 +
> arch/arm/boot/dts/dra7xx-clocks.dtsi | 1983
> ++++++++++++++++++++++++++++++++++
> 2 files changed, 2006 insertions(+)
> create mode 100644 arch/arm/boot/dts/dra7xx-clocks.dtsi
>
> diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
> index d0df4c4..6cf1c76 100644
> --- a/arch/arm/boot/dts/dra7.dtsi
> +++ b/arch/arm/boot/dts/dra7.dtsi
> @@ -104,6 +104,27 @@
> interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
>
> + prm: prm@4ae06000 {
> + compatible = "ti,clock-master";
Likewise, same issues here with the compatible strings and
separating out the clocks and clockdomain data into separate DT
nodes, as discussed with the OMAP4 data patch.
- Paul
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