Em Fri, Jan 28, 2011 at 09:37:03AM -0500, Vince Weaver escreveu:
> On Fri, 28 Jan 2011, Arnaldo Carvalho de Melo wrote:
> > 
> > So far I wrote some that generate tracepoint events, but I can envision
> > for instance, figuring out the size of the L2 processor cache, creating
> > an array that is of that size, then go on touching it till it trashes
> > the cache while measuring the relevant event.
> 
> Unfortunately it is harder to validate perf events than you might guess.

My expectation so far, for basic tests, is not to precisely detect each
and every event, but to make sure that if a big number of cache misses
is being provoked, a big number of cache misses is being detected, to
test the basic working of the system.

After basic tests are in place, we go on trying to make them more
precise as is practical.
 
> For your L2 example, most processors do hardware prefetch in very hard to 
> model way, so the "expected" value never matches anything that you get 
> with the counters.  This is even if you write the tests in assembly
> language to avoid any weird behavior from the C compilers (and there can 
> be, even on something as simple as an array walk).
> 
> Even things you might think are simple, like retired-instructions can vary 
> wildly.  There are enough differences caused by Linux and processor errata 
> with retired-instructions that I wrote a whole 10 page paper about the 
> differences you see.

Cool, can I get the paper URL? I'd love to read it
 
> I have started writing some validation tests, though they use the PAPI 
> library which runs on top of perf-events.  You can see that and other 
> validation work linked to here:
>    http://web.eecs.utk.edu/~vweaver1/projects/validation-tests/

Will look at it, thanks for the pointer, thanks for working on it!

- Arnaldo
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