Hi Andrew, Many thanks for reviewing. Please see my inline comments below.
On Wed, Nov 12, 2014 at 4:37 AM, <[email protected]> wrote: > >From: Naidu Tellapati <[email protected]> >> > >Add binding document for IMG Pulse Width Modulator (PWM) DAC present > >on the Pistachio SOC. The PWM DAC has four channels. >> > >Signed-off-by: Naidu Tellapati <[email protected]> > >Signed-off-by: Sai Masarapu <[email protected]> > >diff --git a/Documentation/devicetree/bindings/pwm/img-pwm.txt > >b/Documentation/devicetree/bindings/pwm/img-pwm.txt > >new file mode 100644 > >index 0000000..4f7f60c > >--- /dev/null >> +++ b/Documentation/devicetree/bindings/pwm/img-pwm.txt >> @@ -0,0 +1,22 @@ >> +*Imagination Technologies PWM DAC driver > >+ > >+Required properties: > >+ - compatible: Should be "img,pistachio-pwm" > >+ - reg: Should contain physical base address and length of pwm registers. > >+ - clocks: phandle to input PWM clock. > >+ - clock-names: input clock names. > >+ Required elements: "pwm". > >+ - #pwm-cells: Should be 2. See pwm.txt in this directory for the > >+ description of the cells format. > >+ - img,cr-periph: Must contain a phandle to the peripheral control > >+ syscon node which contains PWM control registers. > >+ > >+Example: > >+ pwm: pwm@18101300 { > >+ compatible = "img,pistachio-pwm"; > > + reg = <0x18101300 0x14>; > Might as well claim the full 256 bytes. Ok, We will correct it. > >+ clocks = <&pwm_clk_handle>; > >+ clk-names = "pwm"; > s/clk/clock/ Ok, We will correct it. > >+ #pwm-cells = <2>; >> + img,cr-periph = <&cr_periph>; > >+ }; >> -- > >1.7.0.4 >>
