> I missed the fact the clear_bit is not atomic. So to make this
 > complete I will send a new patch with protection on the clear bit.
 > Would you like me to send a patch for user_mad too or would you push
 > that?

Hmm, actually maybe clear_bit is atomic enough for us.
<asm-generic/atmoic.h> says:

 * clear_bit() is atomic and may not be reordered.  However, it does
 * not contain a memory barrier, so if it is used for locking purposes,
 * you should call smp_mb__before_clear_bit() and/or smp_mb__after_clear_bit()
 * in order to ensure changes are visible on other processors.

and I don't think we have an issue with visibility of the updates -- the
worst case I guess is a tiny window where we fail to register a new
device just as we are unregistering another device on a different CPU.

I guess I knew that already once long ago, and so that's why there isn't
locking around the clear_bit parts of things.

 - R.
-- 
Roland Dreier <rola...@cisco.com> || For corporate legal information go to:
http://www.cisco.com/web/about/doing_business/legal/cri/index.html
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