On 03/13/13 08:43, David Laight wrote:
From my recollection of the x86 architecture, the memory barriers are hardly ever needed, certainly not in the places where, for example a ppc needs them. I'd actually suspect that the normal wmb() for x86 should be a nop. About the only place where any on the fence instructions are needed are in relation to write combining accesses. In particular I don't believe they are ever needed to synchronise uncached accesses with each other, or with cached accesses (which are snooped). David
The question at hand is how should we indicate that we're finished with a Write Combined set of stores in an architecturally neutral manner? Is wmb() a good approach? Vipul has noted that the iWarp code uses a new "wc_wmb()" for this purpose which seems to be the same _currently_ as wmb() for all current platforms. I presume that the iWarp folks pick a new name to offer themselves some cover in the future.
And yes, the code sequence that was accidentally included in Vipul's previous patches should never have been submitted for inclusion in kernel.org. It got missed in our internal reviews and I apologize for that.
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