On 01.06.2016 21:20, Geert Uytterhoeven wrote:
Add DT bindings for the Renesas R-Car Reset Controller (R-Car Gen1
RESET/WDT and R-Car Gen2/Gen3 RST).
As the features provided by the hardware module differ a lot across the
various SoC families and members, only SoC-specific compatible values
are defined.
For now we use the RST only for providing access to the state of the
mode pins.
Signed-off-by: Geert Uytterhoeven <geert+rene...@glider.be>
Acked-by: Magnus Damm <damm+rene...@opensource.se>
---
v3:
- Clarify current usage,
- Use "renesas,<soctype>-rst" instead of "renesas,rst-<soctype>",
- Drop "syscon" compatible value,
- Add R-Car M3-W,
- Add R-Car Gen1,
v2:
- Add Acked-by.
---
.../devicetree/bindings/reset/renesas,rst.txt | 35 ++++++++++++++++++++++
1 file changed, 35 insertions(+)
create mode 100644 Documentation/devicetree/bindings/reset/renesas,rst.txt
diff --git a/Documentation/devicetree/bindings/reset/renesas,rst.txt
b/Documentation/devicetree/bindings/reset/renesas,rst.txt
new file mode 100644
index 0000000000000000..488c72e1ee849cd3
--- /dev/null
+++ b/Documentation/devicetree/bindings/reset/renesas,rst.txt
@@ -0,0 +1,35 @@
+DT bindings for the Renesas R-Car Reset Controller
+
+The R-Car Reset Controller provides reset control, and implements the following
+functions:
+ - Latching of the levels on mode pins when PRESET# is negated,
+ - Mode monitoring register,
+ - Reset control of peripheral devices (on R-Car Gen1),
+ - Watchdog timer (on R-Car Gen1).
Quite minor nit: s/./,/
Or drop all the ',' completely?
+ - Register-based reset control and boot address registers for the various CPU
+ cores (on R-Car Gen2/Gen3),
Best regards
Dirk