I got DMA working on the RZ/A1H and started to notice this: spi_master spi0: receive timeout
What seems to be happening is that there is a DMA transfer for the SPI bus happening so the interrupts are masked. A small transfer that is smaller than the fifo size comes along so __rspi_can_dma returns false and a PIO transfer is started but the interrupt to say it's finished is handled by the DMA controller so the spi driver never sees that it finished. Making __rspi_can_dma always return true makes the problem go away. Does anyone have any suggestions to fix it properly? I'm not on the list so please CC me. Cheers, Daniel
