On 30.08.2017 08:48, Simon Horman wrote:
On Tue, Aug 29, 2017 at 12:36:50PM +0200, Dirk Behme wrote:
On 29.08.2017 11:44, Geert Uytterhoeven wrote:
Hi Dirk,
On Tue, Aug 29, 2017 at 11:15 AM, Dirk Behme <dirk.be...@de.bosch.com> wrote:
But ZG and with this module clock #112 is still missing, no?
https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas-bsp.git/commit/?h=v4.9/rcar-3.5.8&id=aa7b99b06d280e4151e
https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas-bsp.git/commit/?h=v4.9/rcar-3.5.8&id=a03bfd8abc9572800fb5043
The ZG bits in the FRQCRB register are documented to exist on R-Car D3
only.
... what contradicts
https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas-bsp.git/commit/?h=v4.9/rcar-3.5.8&id=a03bfd8abc9572800fb5043
Yes, there does seem to be a contradiction there.
and the 3DGE module clock in e.g. MSTPSR1 which is documented for H3 and
M3-W, too, and Table 8.1a List of Clocks [R-Car H3] ZG -> 3DGE etc.
Geert may have a different opinion but mine is not to add clocks
for which we don't have a near-term use in mainline.
In my opinion it would reduce the number of non-mainline patches needed
and with this ease the use of mainline for nearly no cost.
There is always a discussion like "uh, we can't use mainline because it
doesn't support xx (add a random number > 0) features and we have to
apply xx (add a random number > 0) patches to make it work" I'd like to
improve.
Best regards
Dirk
