On Wed, Sep 27, 2017 at 05:04:05PM +0900, Yoshihiro Shimoda wrote:
> This patch fixes two issues:
> - the usbhsf_fifo_clear() is possible to cause 10 msec delay if
> the pipe is RX direction and empty because the FRDY bit will never
> be set to 1 in such case.
> - sets the BCLR of {C,Dn}FIFOCTR to 1 even when it's non-DCP pipe and
> the FRDY bit sets to 0.Should this be two different patches because of this? thanks, greg k-h
