Hi Sergei,
On Fri, Feb 2, 2018 at 7:33 PM, Sergei Shtylyov
<sergei.shtyl...@cogentembedded.com> wrote:
> The initial R8A77980 SoC device tree including Cortex-A53 CPU, GIC, timer,
> CPG, RST, and SYSC.
>
> Based on the original (and large) patch by Vladimir Barinov.
>
> Signed-off-by: Vladimir Barinov <vladimir.bari...@cogentembedded.com>
> Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
Thanks for your patch!
> --- /dev/null
> +++ renesas/arch/arm64/boot/dts/renesas/r8a77980.dtsi
> @@ -0,0 +1,122 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Device Tree Source for the r8a77980 SoC
> + *
> + * Copyright (C) 2018 Renesas Electronics Corp.
> + * Copyright (C) 2018 Cogent Embedded, Inc.
> + */
> +
> +#include <dt-bindings/interrupt-controller/irq.h>
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> +#include <dt-bindings/clock/renesas-cpg-mssr.h>
I think you want to leave out the above #include, as it will go upstream
through a different path (you're already using hardcoded clock numbers,
assuming the same).
With the above fixed:
Reviewed-by: Geert Uytterhoeven <geert+rene...@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
