Fix the incorrect clock name and clock id for the dw_mmc controller.
Signed-off-by: Thomas Abraham <[email protected]>
---
arch/arm/mach-exynos4/clock.c | 8 ++++----
1 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-exynos4/clock.c b/arch/arm/mach-exynos4/clock.c
index 871f9d5..6c89991 100644
--- a/arch/arm/mach-exynos4/clock.c
+++ b/arch/arm/mach-exynos4/clock.c
@@ -473,8 +473,8 @@ static struct clk init_clocks_off[] = {
.enable = exynos4_clk_ip_fsys_ctrl,
.ctrlbit = (1 << 8),
}, {
- .name = "hsmmc",
- .id = 4,
+ .name = "dwmmc",
+ .id = -1,
.parent = &clk_aclk_133.clk,
.enable = exynos4_clk_ip_fsys_ctrl,
.ctrlbit = (1 << 9),
@@ -1072,8 +1072,8 @@ static struct clksrc_clk clksrcs[] = {
.reg_div = { .reg = S5P_CLKDIV_FSYS2, .shift = 24, .size = 8 },
}, {
.clk = {
- .name = "sclk_mmc",
- .id = 4,
+ .name = "sclk_dwmmc",
+ .id = -1,
.parent = &clk_dout_mmc4.clk,
.enable = exynos4_clksrc_mask_fsys_ctrl,
.ctrlbit = (1 << 16),
--
1.6.6.rc2
--
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