Actually, SPI channel 0 on 2443 is mapped to HS SPI controller,
and to enable s3c2410-spi controller, we should power on channel
1 in PCLKCON. There is no channel 0 SPI on s3c2443, so delete its
clock.

Signed-off-by: Alexander Varnin <fenix...@mail.ru>
---
 arch/arm/mach-s3c24xx/clock-s3c2443.c |    6 ------
 1 files changed, 0 insertions(+), 6 deletions(-)

diff --git a/arch/arm/mach-s3c24xx/clock-s3c2443.c 
b/arch/arm/mach-s3c24xx/clock-s3c2443.c
index 7f689ce..bdaba59 100644
--- a/arch/arm/mach-s3c24xx/clock-s3c2443.c
+++ b/arch/arm/mach-s3c24xx/clock-s3c2443.c
@@ -158,12 +158,6 @@ static struct clk init_clocks_off[] = {
                .devname        = "s3c2410-spi.0",
                .parent         = &clk_p,
                .enable         = s3c2443_clkcon_enable_p,
-               .ctrlbit        = S3C2443_PCLKCON_SPI0,
-       }, {
-               .name           = "spi",
-               .devname        = "s3c2410-spi.1",
-               .parent         = &clk_p,
-               .enable         = s3c2443_clkcon_enable_p,
                .ctrlbit        = S3C2443_PCLKCON_SPI1,
        }
 };
-- 
1.7.2.5

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