On 20/10/14 05:32, Chanwoo Choi wrote:
> This patch adds the new clock driver of Exynos4415 SoC based on Cortex-A9
> using common clock framework. The CMU (Clock Management Unit) of Exynos4415
> controls PLLs(Phase Locked Loops) and generates system clocks for CPU, buses
> and function clocks for individual IPs.
> 
> Cc: Sylwester Nawrocki <s.nawro...@samsung.com>
> Cc: Tomasz Figa <tomasz.f...@gmail.com>
> Signed-off-by: Chanwoo Choi <cw00.c...@samsung.com>
> Signed-off-by: Tomasz Figa <tomasz.f...@gmail.com>
> Signed-off-by: Seung-Woo Kim <sw0312....@samsung.com>
> Acked-by: Kyungmin Park <kyungmin.p...@samsung.com>

The patch looks good to me, I've applied it to my tree and will
be sending in a pull request to Mike next week, if there is no
objections.

--
Thanks,
Sylwester
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