On Thu, 17 Dec 1998, Doug Ledford wrote:

> Just so you know though, it isn't a problem in real practice:
>  8:          1 + rtc
>  9:     483377   aic7xxx, aic7xxx, aic7xxx, aic7xxx, aic7xxx, aic7xxx,
> aic7xxx, Intel EtherExpress Pro 10/100 Ethernet
> 10:      18581   scb0
> 
> That's seven aic7xxx busses on one interrupt under 2.0.36 and they only
> marginally spread out better with the IO-APIC code in 2.1.131

The IO-APIC code cannot 'spread out' interrupts. It can take advantage of
a better pin-connection to the IO-APIC, but thats hardcoded in most cases. 
But the IO-APIC can spread out interrupts between CPUs.

-- mingo

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