On Tue, 28 Mar 2000, Andrew Morton wrote:
> > APIC error interrupt on CPU#1, should never happen.... APIC ESR0: 00000002
> > ... APIC ESR1: 0000000a
> > ... bit 1: APIC Receive CS Error (hw problem).
> > ... bit 3: APIC Receive Accept Error.
[...]
> I suspect it's a h/w bug. But the kernel handles the interrupt properly
> and continues.
Actually it's APIC that handles the error. If any transmission over the
inter-APIC bus fails it's repeated (there are some exceptions, but they do
not apply to CheckSum errors) until succeeded. An error interrupt happens
as a side effect and can be enabled or disabled by an OS depending on
whether diagnostics is desired or not. Linux 2.2 keeps this diagnostics
disabled as it's unsupported.
In other words, the kernel need not handle APIC errors at all -- they are
just reported FYI.
An accept error above is surely the result of the reported checksum
error.
--
+ Maciej W. Rozycki, Technical University of Gdansk, Poland +
+--------------------------------------------------------------+
+ e-mail: [EMAIL PROTECTED], PGP key available +
-
Linux SMP list: FIRST see FAQ at http://www.irisa.fr/prive/dmentre/smp-howto/
To Unsubscribe: send "unsubscribe linux-smp" to [EMAIL PROTECTED]
