Le 18/03/2015 16:53, Ben Dooks a écrit :
> Use the endian agnositc IO functions instead of the __raw ones for when
> the driver is in use on big-endian systems.
> 
> Signed-off-by: Ben Dooks <[email protected]>

Looks good to me:
Acked-by: Nicolas Ferre <[email protected]>

Mark,
There is no dependency on the series, so you can take this one right now.

Bye.

> --
> CC: Nicolas Ferre <[email protected]> (supporter:ATMEL SPI DRIVER)
> CC: Mark Brown <[email protected]> (maintainer:SPI SUBSYSTEM)
> CC: [email protected] (open list:SPI SUBSYSTEM)
> ---
>  drivers/spi/spi-atmel.c | 8 +++++++-
>  1 file changed, 7 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/spi/spi-atmel.c b/drivers/spi/spi-atmel.c
> index 06de340..a2f40b1 100644
> --- a/drivers/spi/spi-atmel.c
> +++ b/drivers/spi/spi-atmel.c
> @@ -180,11 +180,17 @@
>         | SPI_BF(name, value))
>  
>  /* Register access macros */
> +#ifdef CONFIG_AVR32
>  #define spi_readl(port, reg) \
>       __raw_readl((port)->regs + SPI_##reg)
>  #define spi_writel(port, reg, value) \
>       __raw_writel((value), (port)->regs + SPI_##reg)
> -
> +#else
> +#define spi_readl(port, reg) \
> +     readl_relaxed((port)->regs + SPI_##reg)
> +#define spi_writel(port, reg, value) \
> +     writel_relaxed((value), (port)->regs + SPI_##reg)
> +#endif
>  /* use PIO for small transfers, avoiding DMA setup/teardown overhead and
>   * cache operations; better heuristics consider wordsize and bitrate.
>   */
> 


-- 
Nicolas Ferre
--
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