Hi Carlo, On Thu, Feb 27, 2014 at 08:34:20PM +0100, Carlo Caione wrote: > Allwinner A20/A31 SoCs have special registers to control / (un)mask / > acknowledge NMI. This NMI controller is separated and independent from GIC. > This patch adds a new irqchip to manage NMI. > > Signed-off-by: Carlo Caione <ca...@caione.org>
Acked-by: Maxime Ripard <maxime.rip...@free-electrons.com> Thanks! Maxime -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com
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