Hi, On 04/23/2014 11:44 AM, Maxime Ripard wrote: > On Tue, Apr 22, 2014 at 01:01:30PM +0200, Hans de Goede wrote: >> Add clk-nodes for the mmc clocks. >> >> Signed-off-by: Hans de Goede <hdego...@redhat.com> >> --- >> arch/arm/boot/dts/sun6i-a31.dtsi | 32 ++++++++++++++++++++++++++++++++ >> 1 file changed, 32 insertions(+) >> >> diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi >> b/arch/arm/boot/dts/sun6i-a31.dtsi >> index d45efa7..12bcc17 100644 >> --- a/arch/arm/boot/dts/sun6i-a31.dtsi >> +++ b/arch/arm/boot/dts/sun6i-a31.dtsi >> @@ -198,6 +198,38 @@ >> "apb2_uart4", "apb2_uart5"; >> }; >> >> + mmc0_clk: clk@01c20088 { >> + #clock-cells = <0>; >> + compatible = "allwinner,sun4i-a10-mod0-clk"; > > This is simply not true. > > module0 clocks don't have any kind of phase control, while we do here.
We've the exact same situation for all of sun4i, sun5i and sun7i. IMHO it would be much simpler to keep things uns sync everywhere, until we actually know how we want to deal with the phase control stuff, and then change the compatible, etc. everywhere at once. Regards, Hans -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.